Lenore M. Restifo Mullin
Associate Professor
 lenore@cs.albany.edu (Personal Page)
PDF Bio
Computer Science Department
University at Albany
Albany, NY 12222
(518) 442-3332
(518) 442-4179 (Psi Lab) 		Ph.D. Computer Science, Syracuse Univ.
M.S. Solid-state Physics, Syracuse Univ.
B.S. Mathematics, SUC at New Paltz, SUNY
Statement of Research
Mullin has over 30 years experience in array based high performance scientific computing. With degrees in Mathematics, Physics, and Computer Science complemented by professional experience in engineering and language development she has the complementary skills to develop initiatives in computational science and high performance scientific computing. She spent 14 years at IBM Research in both the APL Design Group and the Real Time Speech Recognition Group. This experience led to funding by the NYS Science and Technology Foundation to pursue her dissertation topic, A Mathematics of Arrays, followed by a postdoctoral fellowship at Oxford University, culminating in the prestigious NSF Presidential Faculty Fellowship and Grant in 1993. This grant and subsequent NSF grants were given to support the application of A Mathematics of Arrays (MoA) and its associated index calculus, the Psi Calculus, to array based scientific algorithms in both hardware and software. By applying this theory in a uniform way she combines the algorithm, decomposition, and mapping using one paradigm. Using a similar abstract view of advanced architectures, she is able to reason about algorithms and computation that underlies Digital Signal Processing, Computational Quantum Mechanics, and Quantum Computation and Simulation. While on sabbatical at MIT Lincoln Laboratory she was funded by DARPA's Polymorphic Computing Architecture (PCA) project. The PCA project led to current Reconfigurable Application Specific Computers (RASCs). Using MoA and Psi Calculus, referred to as Conformal Computing, she currently is working on describing important algorithms, e.g. FFT, to RASC's complex processor/memory/FPGA architectures. She works with engineers and physicists both nationally and internationally on such problems and is simultaneously working with colleagues at UA to develop curriculum transcending these multiple disciplines. She also works with mathematicians and physicists on quantum algorithms, computing, and simulation. She and her colleagues hope to unite computational quantum mechanics with quantum algorithms using MoA. Mullin is the recipient of a US Patent (No. 5878424) and has over 100 hundred publications. She also practices a unique teaching style, Guided Discovery, learned while studying Mathematics Education as an undergraduate. This style complemented by her mentoring philosophies led to two initial undergraduate honor's thesis, one at the University of Vermont and the other at the University of Missouri-Rolla and was commended in her PFF award, which promoted the combination of research and education.

Current Research Interests include:

I. Embedded Digital Systems: High Performance array-based Algorithms that have Space, Time, and Power constraints, e.g. Radar, Medical Imaging, Sonar. II.Simulation Science: High Performance Algorithms for large, long, verifiable simulations. Issues include building software and software libraries for single and multiple processor environments with complex memory hierarchies, Examples: functional density at abinitio analysis for nano science & open computation. III. High Performance scientific Software and Software Libraries using C++ Expression Templates that allows performance equivalent to C and pointers, thus providing a high level API with high performance. IV. Language and Compiler/Interpreter Optimizations for Advanced Scientific Languages using arrays, e.g. Matlab, C++ and Fortran 90. V. Research Education: Development of Courses and Curriculums for HPC and its involvement in Embedded Digital Systems and Simulation Science.

Mullin, Grout and their students will present their paper entitled, "A Desktop RASC Prototyping System" this fall at ESS 2006 to be held in Birmingham, UK, October 11-12, 2006. ESS is organized by the Microelectronics and Embedded Systems Network of Europe. They will also present another paper entitled, "Abstract Machines for RASCs and Signal/Image Processing", this year at HPEC 2006, held each year at MIT Lincoln Laboratory.

Selected Publications
L. Mullin, X. Luo, and L. Bush, "Building the Support for Radar Processing across Memory Hierarchies: On the Development of an Array Class with Shapes using Expression Templates in C++ ", Proceedings of High Performance Embedded Computing (HPEC) Workshop 2003, MIT Lincoln Laboratory, Lexington, MA.
L. Mullin, " A Uniform Way of Reasoning about Array-Based Computation in Radar ", Digital Signal Processing, Elsevier Publishers, accepted for publication, June 2003.
L. Mullin, D. Rosenkrantz, H. Hunt, and X. Luo, "Efficient Radar Processing via Array and Index Algebras ", Proceedings of 1st Workshop on Optimizations for DSP and Embedded Systems (ODES), San Francisco, CA. March 23, 2003.
L. Mullin, E. Ruttledge, R. Bond," Monolithic Compiler Experiments using C++ Expression Templates ", to appear, Proceedings of High Performance Embedded Computing (HPEC) 2002, MIT Lincoln Laboratory, Lexington, MA, September 24-26, 2002.
L. Mullin, S. Small," Four Easy Ways to a Faster FFT''", Journal of Mathematical Modeling and Algorithms, Kluwer Academic Publishers, 00: pp 193-214, 2002, G Gravvanis editor.
L. Mullin, and S. Small," Three Easy Steps to a Faster FFT(No, We Don't Need a Plan)", Proceedings of 2001 International Symposium on Performance Evaluation of Computer and Telecommunication Systems(SPECTS 2001), Orlando, Florida, July 15-19, 2001.
L. Mullin, and S. Small," Three Easy Steps to a Faster FFT(The Story Continues)", Proceedings of 2001 International Conference on Imaging Science, Systems, and Technology (CISST 2001), Las Vegas, Nevada, June 25-28, 2001.
H.B. Hunt III, L.R. Mullin, and D. J. Rosenkrantz," Experimental construction of a fine-grained polyalorithm for the FFT," Proceedings of the International conf. on Parallel and Distributed Processing Techniques and Applications(PDPTA '99), Las Vegas, Nevada, pp. 1741-1647, June 1999.
D, Rosenkrantz, L. Mullin, and H. Hunt," On Materialization of Array-Valued Temporaries," Proceedings of the 13th International Workshop on Languages and Compilers for Parallel Computing 2000, Yorktown Heights, NY, August 2000, pp. 125-141, LNCS Springer-Verlag, 2002.
L. Mullin, W. Kluge, and S. Scholtz," On Programming Scientific Applications in SAC: a Functional Language Extended by a Subsystem for High-Level Array Operations,"Proceedings of the Eighth International Workshop on Implementation of Functional Languages, Kiel, Germany, September 1996, pp. 321-340.
L. Mullin and M. Jenkins," Effective Data Parallel Computation using the Psi Calculus," Concurrency: Practice and Experience, John Wiley and Sons, September 1996, pp. 499-515.
D. Dooling and L. Mullin," Indexing and Distributing a General Partitioned Sparse Array," UMR TR No. CSC 94-23, Proceedings of Workshop on Solving Irregular Problems on Distributed Memory Machines, at International Parallel Processing Symposium, Santa Barbara. CA, April 1995, p. 96-101.
L. Mullin and G. Hains, "Parallel Functional Programming with Arrays", The Computer Journal, 36:22, March 1993, p. 238-245
G. Gao, R. Yates, J. Dennis, and L. Mullin. "A Strict Monolithic Array Constructor", Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, December 1990, Dallas, Texas, p. 596-600.
G. Gao, R. Yates, J. Dennis, and L. Mullin," An Efficient Monolithic Array Constructor for Scientific Computation," Proceedings of the Third Workshop on Programming Languages and Compilers for Parallel Computing, MIT Press, 1990. Hardware for HPC
H. Pottinger, W. Eatherton, J. Kelly, L. Mullin and R. Ziegler, "AN FPGA Based Reconfigurable Coprocessor Board Utilizing A Mathematics of Arrays," Proceedings of The IEEE Circuits and Systems Symposium(ISCAS95), Seattle, WA, May 1995, pp 945-948.
H. Pottinger, W. Eatherton, J. Kelly, L. Mullin and T. Schifelbein, "Hardware Assists for High Performance Computing Using A Mathematics of Arrays", Proceedings of the ACM Symposium on Field Programmable Gate Arrays (FPGA95), Monterey, California, February 1995, p 39-45.
US Patent: L. Mullin, D. Dooling and D. Moran (IBM)", Method and Apparatus for Indexing Patterned Sparse Arrays for Microprocessor Data Cache," March 1999, No. 5878424.